常見例句雙語例句Bit Error Rate(BER) monitor on-line is implemented by high speed PRBS generator and Bit Interleaved Parity 8(BIP8) in FPGA.利用FPGA產(chǎn)生并行高速偽隨機序列和比特間插奇偶校驗8位碼誤碼塊的方法實現(xiàn)了在線誤碼監(jiān)測。 返回 bit rate generator