memory order buffer
基本解釋
- [計(jì)算機(jī)科學(xué)技術(shù)]存儲(chǔ)器排序緩沖器
英漢例句
- In order to optimize performance, including speed and the usage of its memory, CPU usually hires a Translation Lookaside Buffer(TLB) to translate the virtual address into physical address.
為了提高CPU的速度和更有效的管理物理內(nèi)存,一般都采用轉(zhuǎn)換查找緩沖器(TLB)將虛擬地址轉(zhuǎn)換為物理地址。
雙語(yǔ)例句
專(zhuān)業(yè)釋義
- 存儲(chǔ)器排序緩沖器