nand gate

常見例句

• The TTL family uses the NAND gate,the ECL family uses the NOR gate and the CMOS family uses the inverter.
  晶體管-晶體管邏輯電路元件應(yīng)用NAND柵門，發(fā)射極耦合邏輯電路元件應(yīng)用NOR柵門，補充金屬氧化物半導(dǎo)體元件使用變極器。
• By analyzing scanning admeasuring voltage transmission characteristic of TTL NAND gate, which was ameliorated. ?
  通過分析TTL與非門電壓傳輸特性的動態(tài)掃描測量法,提出了該實驗方法的改進(jìn)措施
• The TTL family uses the NAND gate, the ECL family uses the NOR gate and the CMOS family uses the inverter.
  晶體管一晶體管邏輯電路元件應(yīng)用nand柵門，發(fā)射極耦合邏輯電路元件應(yīng)用nor柵門，補充金屬氧化物半導(dǎo)體元件使用變極器。
• The TTL family uses the NAND gate, the ECL family uses the NOR gate and the CMOS/" target="_blank">CMOS family uses the inverter.
  晶體管一晶體管邏輯電路元件應(yīng)用nand柵門，發(fā)射極耦合邏輯電路元件應(yīng)用nor柵門，補充金屬氧化物半導(dǎo)體元件使用變極器。
• Much the same as the procedure for making a NOR gate behave as a NAND, we must invert all inputs and the output to make a NAND gate function as a NOR.
  大致相同的程序讓或非門表現(xiàn)為一個與非門，我們必須顛倒所有輸和輸出，使一個與非門的作為或非門。
• When either NAND gate pulls low, the SLO state overrides the WHI state from the resistor and the net state is resolved to be logic low.
  當(dāng)與非門的任何一個輸入電平為低時，SLO狀態(tài)通過電阻R1克服WHI狀態(tài)，使得最后的狀態(tài)為邏輯低電平。
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