output decoder

基本解釋

The input bit rate and the output frame rate of video decoder is fix, so a Rate Buffer is needed to balance this rate difference.
而經(jīng)解碼后顯示的偵速率是恒定的，這就要求在解碼端有一個(gè)緩沖器來實(shí)現(xiàn)輸入碼率與輸出碼率間的過渡。
A high-throughput low-power Soft-Output Viterbi decoder designed for the convolutional codes used in the ECMA-368 UWB standard is presented in this thesis.
本文針對ECMA-368超寬帶標(biāo)準(zhǔn)采用的卷積碼設(shè)計(jì)了一個(gè)軟輸出維特比譯碼器。
Timing adjusting circuits have a ferroelectric capacitor for timing adjustment in transmitting the activation signals output from the column decoder to the sense amplifier circuits.
定時(shí)調(diào)整電路具有鐵電電容器，用于在把從列解碼器輸出的激活信號(hào)發(fā)送到檢測放大器電路時(shí)進(jìn) 行定時(shí)調(diào)整。
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