retiming

常見(jiàn)例句

• Finally, retiming a transaction to alter the tax year it falls under is an example of avoidance.
  最后, 再時(shí)間安排一個(gè)交易改變稅年它陷入是一個(gè)避免的例子。
• On the circuit level optimization, two logic circuit optimization methods, RaR and SRAR, are proposed. The optimization step of retiming and resynthesis can solve the problem of logic circuit redundancy efficiently and reduce the hardware cost.
  在電路級(jí)的優(yōu)化設(shè)計(jì)中,本文總結(jié)分析了RaR邏輯優(yōu)化和SRAR邏輯優(yōu)化兩種優(yōu)化方法,通過(guò)重定時(shí)和再綜合的優(yōu)化步驟,有效解決邏輯電路冗余的問(wèn)題,從而減少了硬件電路的開(kāi)銷(xiāo),并通過(guò)實(shí)例驗(yàn)證分析了這兩種優(yōu)化方法。
• In this paper,we discuss the implementation problem of the FEAS algorithm and improve this algorithm.We propose an retiming algorithm which can quickly optimize sequential circuits.
  討論了FEAS算法的實(shí)現(xiàn)問(wèn)題,對(duì)FEAS算法進(jìn)行了改進(jìn),并提出一種能快速的完成同步時(shí)序電路的時(shí)序重構(gòu)變換的方法。
• Retiming in Logic Synthesis of ASIC
  ASIC邏輯綜合中重定時(shí)序
• DFG Optimization: Retiming and Association
  數(shù)據(jù)流圖的優(yōu)化：時(shí)序重構(gòu)和結(jié)合關(guān)系重構(gòu)
• Modified Retiming for the Timing Optimization of High Speed Logic Circuits
  一種用于高速邏輯電路綜合優(yōu)化的新算法
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