time synchronizer

基本解釋

The use of synchronizer will prolong the total shifting time.
同步器使換檔過程總時(shí)間延長；
The theoretic analysis and computation results show it greatly decrease the mean time of frame loss and amend the performances of SDL frame synchronizer.
理論分析和計(jì)算結(jié)果表明，此方案可以有效降低SDL 幀同步的失步平均持續(xù)時(shí)間，改善了SDL 幀同步系統(tǒng)的性能。
The whole circuit consists of Sample and Hold Circuit, the Multiplicative A/D Converter, the Sub-ADC, the Digital Calibration Circuit, the Clock Generator and the Time Synchronizer.
流水線ADC的模塊有采樣保持電路、乘法數(shù)模轉(zhuǎn)換器、子ADC、數(shù)字校正電路、時(shí)鐘產(chǎn)生電路和時(shí)間對(duì)齊電路。