bit-synchronous

常見(jiàn)例句

This paper discusses the advantages of PLD (programmable logical device) in designing a digital circuit,and at the same time,discusses how to realize a 6 bit synchronous up/down counter with clear by using PLD GAL16V8.
介紹了PLD器件在設(shè)計(jì)數(shù)字電路時(shí)的優(yōu)越性，同時(shí)敘述了以PLD器件GAL16V8實(shí)現(xiàn)六位可清零、可置數(shù)的同步可逆計(jì)數(shù)器的原理。
Taking PCM/DPSK for example, the effects by Doppler velocity during the course of bit synchronization and demodulation are analyzed.
竝以PCM/DPSK信號(hào)爲(wèi)例, 分析了多普勒頻率對(duì)位同步及解調(diào)過(guò)程的影響。
For receiving data correctly , another important problem of TDM system is how to realize bit synchronizing and frame synchronizing .
爲(wèi)了正確的接收數(shù)據(jù),時(shí)分複用系統(tǒng)需要解決的另一重要技術(shù)就是位同步和幀同步的問(wèn)題。
He bit off a large piece of the apple.
他咬下一大塊蘋(píng)果。
She was a bit queer after her husband deserted her.
她遭丈夫遺棄後精神有點(diǎn)失常。
To demodulate GMSK signal,DSP is used in receiver to achieve error spectrum estimation,bit synchronization recovery and decode.
爲(wèi)了實(shí)現(xiàn)GMSK信號(hào)解調(diào)，接收機(jī)中DSP實(shí)現(xiàn)了調(diào)制信號(hào)的誤差頻譜估計(jì)、位同步恢複及譯碼。