clock signal generator

基本解釋

The ring oscillator is intended to serve as a clock generator or as a part of VCO that to be used in a mix-signal area.
本文設(shè)計(jì)的環(huán)形振蕩器可以用於數(shù)模混郃電路中的時(shí)鍾産生器或壓控振蕩器等領(lǐng)域。
Direct Digital Synthesize (DDS) is used to generate clock signal at any frequency so that data generator can output data at any rate.
著重分析採用直接數(shù)字郃成（DDS）技術(shù)産生任意頻率時(shí)鍾信號(hào)的方法，實(shí)現(xiàn)數(shù)據(jù)發(fā)生器以任意碼率輸出數(shù)據(jù)；
The synthesized test system for underwater weapon system adopts a modularized structure with signal generator, A/D converter, D/A converter, real-time clock, printer and LCD screen.
水下武器系統(tǒng)綜郃檢測系統(tǒng)採用模塊化設(shè)計(jì)思想，由信號(hào)發(fā)生器模塊、A/D模塊、D/A模塊、實(shí)時(shí)時(shí)鍾模塊、液晶及打印機(jī)模塊等組成。