common-mode rejection voltage
基本解釋
- [計(jì)算機(jī)科學(xué)技術(shù)]共模拒拆電壓公用模式排斥電壓
英漢例句
- The main design work as follow: the former disposal circuits were designed, and the circuit possesses very high input resistance, common-mode rejection and voltage gain;
具躰設(shè)計(jì)內(nèi)容包括:設(shè)計(jì)具有輸入阻抗大、高增益和高共模抑制比的腦電信號(hào)調(diào)理電路;
雙語(yǔ)例句
專業(yè)釋義
- 共模拒拆電壓
- 公用模式排斥電壓