differential signaling

基本解釋

This is a sophisticated differential signaling system that we haven’t previously known about.
這是一個我們先前不了解的精密複襍的微分信號系統(tǒng)。
Low Voltage Differential Signaling (LVDS), a high speed I/O interface, is one important research problem of recent CMOS circuit design.
低電壓差分信號（LVDS）高速I/O接口單元儅前CMOS電路設計中的重要研究課題。
The sensor has 32 10-bit digital Low Voltage Differential Signaling (LVDS) outputs that enable transfer of image data over a standard industry protocol at low power and low noise.
該傳感器有32個10位數(shù)字低電壓差分信號傳輸（LVDS）輸出，使超過1在低功耗和低噪音標準工業(yè)協(xié)議的圖像數(shù)據(jù)傳輸。

transition differential minimized signaling 轉(zhuǎn)換微分最小信號
low voltage differential signaling 低電壓差分信號;低壓差分信號;低電壓差動訊號;和低電壓微分信號
Reduced Swing Differential Signaling 抑制擺幅差分信號
Transition Minimized Differential Signaling 傳送時以;差分信號;轉(zhuǎn)移差動訊號;最小化轉(zhuǎn)移差動訊號
differential current mode signaling 搭配差分電流模式訊號